| 摘要 |
PURPOSE:To reduce the output impedance without sacrificing gain and noise characteristics by a method wherein an impedance element is provided on a chip in series outside the FET operating region to the gate on the drain side of two gates between a pair of source and drain. CONSTITUTION:A source electrode 11, a drain electrode 12, and gate electrodes 13 and 14 exist on a MOSFET chip 10. A resistant element 16 is provided outside the FET operating region 15 in series with the gate region, on the gate electrode 14. The element 16 has a good low resistance and uses a semiconductor layer resistor, a poly Si or film resistor, etc., and the value thereof is selected appropriately according to using purpose of the device. When the impedance element is provided in the second gate in this manner, the output impedance decreases, the increase of noises and the decrease of gain do not occur, the difficulties in circuit design and manufacture are removed, and accordingly a dual gate type FET can be put into practical use. |
