| 摘要 |
PURPOSE:To test the output of a logical array by providing a latch driver to the logical array consisting of an AND array and an OR array and outputting an output signal from the logical array to the outside by a timing signal. CONSTITUTION:In case of an instruction to increase the contents of an external memory, an instruction code is read out from the external memory at timing T1 and stored in an instruction register 2 through an external data bus, a bilateral bus driver 1 and an internal data bus (a). At the succeeding timing T2, an output of the logical array 3 consisting of the AND array 3-1 and the OR array 3-2 which is the decoded result of the instruction code is outputted from latch driver 5 to the external data bus (c) through the bus (a) and the driver 1. The output is detected as the test output of the logical array 3. At timing T3, the external memory is accessed, the accessed contents are stored in an execution part and the output of the array 3 is latched by a latch driver 5. |
