| 摘要 |
PURPOSE:To accelerate the response of a bit line clamping circuit and to realize a high-speed operation of a semiconductor memory, by applying the output signals of current switches constituting bit driver circuits to the bit lines via an emitter follower and in the form of the clamping voltage of the bit line. CONSTITUTION:The output signals of current switches CS1 and CS2 constituting bit drivers BD1 and BD2 are connected to bit lines BD1, (-BD1), BD2 and (-BD2) via emitter follower transistors OBC1 and OBC2 as well as diodes D1, D2, (-D1) and (-D2) respectively. Thus a clamping circuit of the bit driver is driven directly with the output signal of the current switch of the bit driver. As a result, the response of the bit line clamping circuit is never slower than the operation of a bit line switch for a switch between selection and non-selection of the bit line. This ensures a high-speed access while the contents of a memory cell are kept stable. |
