| 摘要 |
PURPOSE:To simplify the constitution of the titled circuit, by executing multiplication of a galore body necessary for an error location calculator body by a linear shift register, and also executing division by converting its divisor into the reciprocal number and multiplying the converted reciprocal number by a dividend. CONSTITUTION:When divisor alpha<j> data set in a shift register 53 is written in a conversion table stored in a converter 51 at the execution of alpha<i>divided by alpha<j>, reciprocal data alpha<-j> outputted from the converter 51 are supplied to a multiplier 54 as it is as multiplicand data and immediately multiplied with dividend data alpha<i> supplied to the multiplier 54 through a shift register 52. When the alpha<j> data are not included in the conversion table in the converter 51, Reciprocal data alpha<-(j+m)> are obtained by using the fact that alpha<j+m> is made coincide with any of alpha<8k+1> in a process multiplying alpha with alpha<j> several times. In said case, alpha<i> is previously multiplied by the multiplicand alpha<m> and these values are inputted to the multiplier 54 to find the required divided result from the multiplied result. |
