| 摘要 |
An apparatus for use in a stand alone microcomputer controlled system having a digital memory device and a microprocessor unit includes a small battery supply and circuitry for sensing the power applied at the power terminals of the microprocessor unit and the digital memory device to control initial power application and power supply failure in a manner to prevent loss of volatile digital data. The memory power requirements in the power off or standby mode are approximately 1000 times less than in the operating mode thereby to permit volatile data to be stored in a volatile random access memory for a substantial time independent of system power. The monitoring circuitry includes circuitry for detecting the power levels, switching the power, disabling the memory device in the microprocessor, and for restarting the microprocessor once power has been restored. Specifically, the circuitry comprises first and second comparators coupled in cascade, one of which senses the voltage level the other acting as a portion of a switch for disabling the memory device, timing capacitors and switching diodes for decoupling the power supply from the backup battery supply.
|
