发明名称 SEQUENCE CONTROLLER
摘要 PURPOSE:To ensure the longest sequence control, by controlling the output time of a control data on the basis of a coding data obtained by run length coding the output time of the same control data delivered continuously from latch circuits and storing them into an ROM. CONSTITUTION:An enable signal generator 51 compares 53 the value B obtained by counting pulses 24 supplied from a rotary encoder 21 by the 3rd counter 52 with a run length data A given from each output terminal QH of latch circuits 33-40 and then permits the counting of the 1st counter 23 when A=B is satisfied. The lower and upper addresses of an ROM32 are generated from the 1st and the 2nd counters 23 and 42 respectively. The addresses of the circuits 33-40 are designated by the address signal An of the counter 42, and these latch circuits read in output data O1-O8 of the ROM32 in time division and synchronously with the system clock signal of an oscillator 41. Then the circuits 33-40 supply their control output data O1A-O8H to the elements to be controlled. In such a way, it is possible to perform a long sequence control with a simple ROM.
申请公布号 JPS58214909(A) 申请公布日期 1983.12.14
申请号 JP19820096891 申请日期 1982.06.08
申请人 CANON KK 发明人 YOKOMIZO YOSHIKAZU
分类号 G05B19/02;G05B19/045 主分类号 G05B19/02
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