发明名称 |
DYNAMIC DEVICE ADDRESS ASSIGNMENT MECHANISM FOR A DATA PROCESSING SYSTEM |
摘要 |
<p>BC9-80-012 DYNAMIC DEVICE ADDRESS ASSIGNMENT MECHANISM FOR A DATA PROCESSING SYSTEM A peripheral device address assignment mechanism is described which does not require the use of plugboards or jumpers. This mechanism enables a host processor to select any desired peripheral device and set its device address to any desired value at any desired time. This is accomplished by providing each peripheral device control unit with a loadable device address register for holding the device address assigned to its peripheral device. Each device control unit is further provided with circuitry responsive to the appearance of a unique I/O command on the processor I/O bus and to the activation of a unique set of the I/O bus data lines by the processor for loading into its device address register the desired device address value as supplied thereto by the processor via the I/O bus.</p> |
申请公布号 |
CA1158778(A) |
申请公布日期 |
1983.12.13 |
申请号 |
CA19810378809 |
申请日期 |
1981.06.02 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
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分类号 |
G06F3/00;G06F12/06;G06F15/00 |
主分类号 |
G06F3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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