发明名称 ON-LINE TEST SYSTEM
摘要 PURPOSE:To attain the test on an on-line, by providing an imaginary test address generating means for a terminal device and providing a test address discrimination means for a processor, for executing a test to the terminal device when the address is discriminated as the test address. CONSTITUTION:The processor 1 and the terminal device 2 are connected with a data line 7, and the terminal device 2 is provided with a terminal address generating circuit 4 and a data conversion circuit 5. Further, the processor 1 is provided an address comparator 8, to which a compaison address 9 discriminating whether the terminal is the test mode is applied, and when the address from the terminal device 2 is the test mode, a test program start signal 10 is outputted. Further, the circuit 4 of the terminal device 2 is provided with a selector 14 and a test mode changeover switch 13, and in case of the normal job, a physical address 11 is outputted from the selector 14 as a teminal address 6, and in case of the execution of test, the switch 13 is changed over, an imaginary address 12 for test is outputted, allowing to perform the test on on-line.
申请公布号 JPS58213358(A) 申请公布日期 1983.12.12
申请号 JP19820094841 申请日期 1982.06.04
申请人 HITACHI SEISAKUSHO KK 发明人 SUZUKI MASAO
分类号 G06F11/22 主分类号 G06F11/22
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