| 摘要 |
PURPOSE:To hold low current consumption characteristics and to attain high- speed operation, by using an NOR composite signal consisting of a data signal and an antiphase clock signal as a logical composite signal. CONSTITUTION:A p-channel MOSTR11 and an n-channel MOSTR12 are cascaded each other; a precharging clock signal phi is inputted to the gate of the MOSTR11 and a signal obtained by composing a data signal and an antiphase signal against the signal phi by the NOR gate circuit 13 is inputted to the gate of the MOSTR12. When the signal phi is inputted at the L level, the TR11, 12 are kept on and off, respectively and the potential level of a terminal Din is the same as that of a power supply VDD. If a data signal Din is inputted at the L level when the signal phi is the H level, the TR12 is turned on and the potential of the terminal Dout can be turned to the potential of GND. In addition, it is the same as conventional cases that the operation current at the time is a fine current depending upon the charge previously accumulated in the stray capacity of an output terminal point. |
