发明名称 FORCED LOOP CIRCUIT
摘要 PURPOSE:To execute a program of a prescribed part repetitively to attain observation, by looping an arbitrary part of the program forcedly without rewriting the content of the program. CONSTITUTION:A CPU 10 transmits a readout address of an ROM 30 to an address decoder 20 for performing readout control of the ROM 30. A loop address designating circuit 40 designates and stores an address desired to be replaced into a jump instruction to a jump address storage register 50, a jumped address storage register 60, and sets the desired address to the registers 50, 60. A bit train corresponding to the jump instruction is stored in a jump instruction register 70. An address received from the register 50 and an ROM 30 readout address received from the CPU 10 are compared 80, and when they are coincident, an address coincidence signal EA is supplied to an access control section 90, which supplies a readout inhibiting signal by the signal EA to inhibit the readout of the ROM 30, and the CPU 10 jumps the program from the address of the register 60 to that of the register 70.
申请公布号 JPS58213353(A) 申请公布日期 1983.12.12
申请号 JP19820095699 申请日期 1982.06.04
申请人 FUJI XEROX KK 发明人 HOSOKAWA TATSUTO;NISHIMOTO MASAHITO
分类号 G06F9/32;G06F11/28;(IPC1-7):06F9/32 主分类号 G06F9/32
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