发明名称 RECEIVING CIRCUIT
摘要 PURPOSE:To reduce signal distortion at the reception of a high input signal, to improve SN and speed up an AGC, by applying DC reaction due to the output of an AM detecting circuit to an intermediate frequency amplifier circuit and an AM frequency converting circuit to control its gain and controlling the former circuit prior to the latter one. CONSTITUTION:At the reception of a high input signal, the voltages of the emitters of AM detecting TRs 401, 402 and the base of a TR411 are increased, the TR411 is gradually turned off, TRs 412 and 305 are connected successively and a TR306 is turned off. Subsequently, the current of TRs 301, 302 in the intermediate frequency amplifier circuit is reduced and the gain is also reduced. When an input signal is applied furthermore, the TR306 is completely disconnected and disabled to control the circuit 3, so that an 1F signal to be applied to the detection circuit is increased furthermore, a TR123 is turned on, the current of a TR110 is reduced, and the current of TRs 102-107 in the frequency converting circuit 1 is reduced to reduce the gain. Consequently, a detection signal having no distortion is obtained by controlling the 1F signal. If the base voltage of the TR306 is reduced to lower than the TR10, the AGC of the circuit 3 is operated at a high speed, the circuit 1 is delayed and after improving SN, the AGC of the circuit 1 is actuated.
申请公布号 JPS58213533(A) 申请公布日期 1983.12.12
申请号 JP19820096421 申请日期 1982.06.04
申请人 MATSUSHITA DENKI SANGYO KK 发明人 OOKUBO TSUNEO
分类号 H04B1/26;H03G3/30 主分类号 H04B1/26
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