发明名称 PROCESS SIGNAL INPUTTING SYSTEM
摘要 PURPOSE:To reduce the number of parts, and to input easily a process, by sampling digitized signals of plural signal groups in a prescribed period like time division, and regarding its sampling value as a true sampling value in case when it coincides continuously by a prescribed number of times. CONSTITUTION:N-number of signal groups SG1, SG2-SGn consisting of m- number of signals, respectively are level-converted 4, are sent to a multiplexer 11, and a signal of (m) bits consisting of combination of ''1'' of ''0'' or each group is sampled and is set to a register 12. Its output is compared with a data of one sampling period before, which is accumulated in a memory 17, by a comparing circuit 13, and its result is written in the memory 17 through a gate 19. Subsequently, the first and the second selecting signals are outputted from the memory 17 in accordance with coincidence and dissidence of new and old sampling data of a prescribed number of times, respectively. When said signals are received, a selecting circuit 16 selects a data from the register 12 in case of the first selecting signal, and selects a data from a register 4 in case of the second selecting signal.
申请公布号 JPS58211203(A) 申请公布日期 1983.12.08
申请号 JP19820095262 申请日期 1982.06.03
申请人 FUJI DENKI SEIZO KK;FUJI FUAKOMU SEIGIYO KK 发明人 KATOU TOMIO
分类号 G05B15/02;(IPC1-7):05B15/02 主分类号 G05B15/02
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