| 摘要 |
PURPOSE:To realize the high-speed reading, by switching one of two power supplies of a static memory cell to the third power supply during the reading of a memory cell and therefore increasing the potential difference of a memory compared with the potential difference of a pause mode period of the memory. CONSTITUTION:A memory cell consists of resistance element loads R1 and R2, transistors T1-T4 and a pair of bit lines BL and BL'. The high and low potential voltages of the memory cell are set at the VDDC and SDDC respectively, and the back gate voltage of transistors T1-T4 is set at VXBN respectively. Thus the potential difference between a power supply VDD and the other power supply -VB of the memory cell can be increased compared with the pause mode period of the memory. This ensures the high-speed reading. |
