| 摘要 |
PURPOSE:To attain the reduction of the chip area and the speed-up and low noises of a transistor by shallowing the depth of a diffused layer without decreasing the withstand voltage by a method wherein the expansion of a depletion layer is increased by arranging metallic electrodes of low potential onto an insulation film on a P-N junction. CONSTITUTION:The depletion layer which expands to an N type region 31 just below a wiring becomes larger from 48 to 48' by receiving the influence by the potential of the Al wiring 35 of low potential, accordingly the avalanche breakdown voltage of the junction 47 remarkably increases. Since there is the risk that the interface between the N type epitaxial layer 31 outside the wiring 35 and the insulation film 49 is inverted into P type and then leakage current flows toward the substrate, etc., an Al wiring 36 of high potential is provided in order to prevent the surface inversion. The N<+> diffused layer 37 prevents the inversion of the N type epitaxial layer by the Al wiring 34 and 35 of low potential and the outflow of current from a resistance region 32 to the outside of the region surrounded by the wiring 36. |
