发明名称 Multiprocessor with independent direct cache-to-cache data transfers.
摘要 <p>In a data processing system having multiple processors with individual cache stores, a cross-interrogation is made in other caches if requested data is not found in the local associated cache. Data paths (67, 74, 83, 86, 201, 202, 203, 207,208) and communication controls (20, 21, 22, 23, 50, 76, 77) are provided to enable direct cache-to-cache and cache-to-channel data transfers thus saving main storage accesses and the necessity to wait for main storage availability. </p>
申请公布号 EP0095598(A2) 申请公布日期 1983.12.07
申请号 EP19830104482 申请日期 1983.05.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 KRYGOWSKI, MATTHEW ANTHONY;MESSINA, BENEDICTO UMBERTO;SILKMAN, WILLIAM DEAN
分类号 G06F15/16;G06F12/08;G06F12/16;(IPC1-7):11C9/06 主分类号 G06F15/16
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