发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To completely prevent parasitic thyristor effect only by biasing the base and emitter of parasitic transistors Tr1 and Tr2 to approx. 0.3V by a method wherein Schottky barrier diodes SD1 and SD2 are formed at the first and second island regions. CONSTITUTION:The Schottky diodes 18 are formed on the surfaces of the first and second island regions 13 and 14. The Schottky barrier diode 18 of this first island region 13 is connected in a forward direction between P<+> type diffused regions 16 and the first island region 13, and the Schottky barrier diode 18 of the second island region 14 is connected in a forward direction to an isolation region 15 between the adjacent first and second island regions and to a region between the second island 14. Such a connection is attained by vapor deposited aluminum as shown in the figure. Since the base and emitter of the Tr1 are forward-biased by the SD1 and thus kept at approx. 0.3V in the circuit shown by the figure, the Tr1 does not turn ON. The base and emitter of the Tr2 is likewise kept at approx. 0.3V by the SD2, therefore the Tr2 does not turn ON either.
申请公布号 JPS58210658(A) 申请公布日期 1983.12.07
申请号 JP19820093345 申请日期 1982.05.31
申请人 SANYO DENKI KK;TOKYO SANYO DENKI KK 发明人 TABATA TERUO;ASANO TETSUO
分类号 H01L29/73;H01L21/331;H01L21/8222;H01L27/06;H01L27/092 主分类号 H01L29/73
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