发明名称 MULTIPROCESSOR SYSTEM
摘要 <p>A multiprocessor system has a plurality of processors and a memory unit which are interconnected through a common bus. Each processor communicates with the memory through the bus. Communication among processors is also effected by storing in memory, into memory zones the messages intended for the several processors, each dedicated to one processor but accessible to all the processors. This operation is performed using the common bus and the normal memory communication procedure. A notify signal is sent on the common bus and identified by the only processor for which it is intended. The notifying signal is memorized by the notified processor without interrupting its continued operation and is taken into account in a completely autonomous way as to the notifying processor. The identification of the notifying signal causes the notified processor subsequently to access the memory unit and read out the message.</p>
申请公布号 CA1158363(A) 申请公布日期 1983.12.06
申请号 CA19800365949 申请日期 1980.12.02
申请人 HONEYWELL INFORMATION SYSTEMS ITALIA S.P.A. 发明人 BARDOTTI, ANGELO
分类号 G06F12/00;G06F13/38;G06F13/42;G06F15/16;G06F15/167;G06F15/177;(IPC1-7):G06F3/00;G06F13/00 主分类号 G06F12/00
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