发明名称 ADDRESS QUALIFYING CIRCUIT
摘要 PURPOSE:To ensure the digital signal processing which is easy to be programmed with a simple constitution, by controlling a switch circuit to decide whether or not the output of an index saving register which stores temporarily the index register value is added to an adder. CONSTITUTION:An index register IX holds the value of an index pointer, and an index saving register IXS stores temporarily the value of the register IX. The 1st switch circuit SW1 has a control to decide whether or not the output of the register IX is added to an adder ADD. The 2nd switching circuit SW2 has a control to decide whether or not the output of the register IXS to the adder ADD. Therefore an address designated by an instruction and the outputs of registers IX and IXS are supplied to the adder ADD.
申请公布号 JPS58208852(A) 申请公布日期 1983.12.05
申请号 JP19820091524 申请日期 1982.05.29
申请人 FUJITSU KK 发明人 KARIBE HIROHISA
分类号 G06F9/355;G06F17/10;H03H17/02;(IPC1-7):06F9/36 主分类号 G06F9/355
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