| 摘要 |
PURPOSE:To simplify the test and shorten the required time for the test by a method wherein an output invert buffer which inverts the output signal from an IC internal circuit and thus outputs it to an IC output pin through an output pad and a detection circuit for test mode setting input which outputs the test mode setting signal for setting the internal circuit to the test mode are provided. CONSTITUTION:At the time of the normal operation mode of the circuit, the Q output end signal line 7 of a F/F 3 is at level ''0'', and the output signal of an output signal line 1 is outputted to an external output pin through the output invert buffer 2 and the output pad 4. When testing, first the input signal is fixed in a fixed state so that the output pin of the output pad 4 is in the state of level ''0'', and the forced pulse for setting the test mode at level ''1'' is impressed on said output pin. In this case, clock input rises after the delay time by a delay circuit 5 and an OR-circuit 6, therefore the Q output end of the F/F 3 is set at level ''1'', and accordingly operation command input is supplied. The output pin of a system circuit and a test mode setting input pin are both used in combination by one piece. |
