| 摘要 |
PURPOSE:To prevent the line-to-line short of the second layer gates at the two layer gate structural MOS integrated circuit by a method wherein buried layers are formed at the step parts of the first layer gates. CONSTITUTION:After a thermal oxide film 12 is grown on a silicon substrate 11, the first layer gates 13 consisting of poly-silicon doped with phosphorus are formed according to the normal CVD method, phosphorus diffusion technique and phot etching. After then, a thermal oxide film 14 is grown moreover, and then the second layer gate oxide films 15 are grown. Then after a poly-silicon layer 16 doped with phosphorus is formed as to cover the whole, the poly-silicon layers 17 for burying are formed at the sides of the first layer gates 13 according to etching. After a thermal oxide film 18 is formed finally, the second layer gate 19 is formed on the whole surface according to the CVD method and the photo etching method. |
