发明名称 MONOLITHIC INTEGRATED CIRCUIT WITH INTEGRATED CAPACITOR
摘要 <p>The integrated capacitors are disposed in the parts of the surface which are usually unoccupied and are situated between the terminal pads (2...) among themselves and between the latter and adjacent circuit parts (3) and the edge of the substrate (1) of the integrated circuit in a manner such that they at least partially enclose a terminal pad (2...). In an MOS integrated circuit having a substrate bias generator circuit (17), one of the capacitors is situated between the leads (14, 15) for the operating voltage and the circuit zero point and one between the leads (16, 15) for the substrate terminal and the circuit zero point. <IMAGE></p>
申请公布号 JPS58206150(A) 申请公布日期 1983.12.01
申请号 JP19830076318 申请日期 1983.05.02
申请人 ITT IND INC 发明人 RIYUBOMIRU MISHITSUKU;DANIERU MURINEKU;RAINAA BATSUKESU;FURIIDORITSUHI SHIYUMITSUTOPOTSUTO
分类号 H01L27/04;H01L21/60;H01L21/822;H01L21/8234;H01L27/02;H01L27/06;H01L27/08;H01L29/94 主分类号 H01L27/04
代理机构 代理人
主权项
地址