发明名称 DATA PROCESSOR
摘要 PURPOSE:To obtain the address of the 1st word in instruction reexecution easily, by providing a buffer counter, and performing relative address calculation at a high speed even when the starting point of the address calculation is set at the 1st word of an instruction. CONSTITUTION:When an instruction other than a branch instruction is executed, the contents of an instruction counter IC41a are stored in the buffer counter ICB41b in the ending of the execution and when the branch instruction is executed, a calculated relative address value is stored in the IC41a and ICB41b at the same time. If a fault occurs, the contents of the ICB41b are transferred to the IC41a and the execution of instruction is started to perform the reexecution of an instruction where the fault occurs. Further, the address of the 1st word of an instruction being executed is held in the ICB41b, so the relative address is calculated by only one adding operation.
申请公布号 JPS58205256(A) 申请公布日期 1983.11.30
申请号 JP19820088204 申请日期 1982.05.24
申请人 MATSUSHITA DENKI SANGYO KK 发明人 SHIMAZAKI SHIGEO;NISHIKAWA HIROSHI;HIROGAMI ETSUKO;KAWAKAMI KATSURA
分类号 G06F11/14;G06F9/30;G06F9/32 主分类号 G06F11/14
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