发明名称 Integrated logic circuit conceived in a manner such as to simplify its implantation on a substrate.
摘要 <p>1. Integrated logic circuit comprising a pattern of line conductors and a pattern of column conductors crossing each other in a zone of implantation of logic gates, certain regions of crossing between a line conductor and a column conductor comprising an insulation between these two conductors and other regions comprising a transistor in a so-called "normal" arrangement (X) having a main electrode (68) connected to a column conductor (62) and a control electrode (69) connected to a line conductor (60), characterized by the fact that other regions of crossings between a line conductor and a column conductor, both of which are further connected to normal arrangement transistors at the crossing regions of the same implantation zone, comprise a transistor in a so-called "inverted" arrangement (0) having a main electrode (72) connected to the line conductor (60) and a control electrode (74) connected to the column conductor (76).</p>
申请公布号 EP0095418(A1) 申请公布日期 1983.11.30
申请号 EP19830401017 申请日期 1983.05.20
申请人 SOCIETE POUR L'ETUDE ET LA FABRICATION DE CIRCUITS INTEGRES SPECIAUX - E.F.C.I.S. 发明人 MEYER, JACQUES;CRU, ROGER
分类号 H01L27/112;H03K19/177;(IPC1-7):01L27/10;03K19/177 主分类号 H01L27/112
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