| 摘要 |
PURPOSE:To obtain a memory having a defects relief circuit, by arranging n/2 lines of normal bit lines of an arranged memory array, when arranging (n) lines of auxiliary lines, in order to eliminate the unbalance between the memory arrays. CONSTITUTION:The point which differs from a conventional one is that n/2 of the normal bits of memory arrays 16c and 16d are transferred to a part 1 indicated in a memory array 5. Due to this constitution, the length of lead wire 3 can be made to be the same to reduce bad influence given to memory characteristics. In this example, a memory having a stabilized defects relief circuit and giving no bad influence on memory characteristics is realized without increasing the size of a tip. Further, if part of the normal data lines is transferred to other arrays, it does not effect on an auxiliary line controlling circuit. The transfer of the normal data lines is performed including a decoder. The bad influence of the transfer is never caused. The increase of word line length per array due to the addition of (n) lines of auxiliary lines becomes n/2 of data lines so that time delay is lessened in comparison with a conventional method which increases the line by (n) lines. |
