| 摘要 |
PURPOSE:To simplify the constitution of a circuit, by transferring data between an I/O port and an RAM without passing a CPU by a means to detect the time of data transfer from the CPU. CONSTITUTION:When receiving an interruption request to input/output data, the CPU1 executes an interruption routine. During the execution of the routine, a switching circuit 5 selects an I/O inport to/from which data are transferred through a shift register, a transceiver, an AND gate, and an inverter which are built in the switching circuit 5 in accordance with an inputted status signal and then the circuit 5 is disabled. Consequently, the CPU1 is separated from a data bus and the data from the selected I/O inport is directly transferred to an RAM3. |
