发明名称 WAFER TESTING SYSTEM
摘要 PURPOSE:To cut a total processing time by establishing a wafer test system through combination of pretest process, intermediate test process and post test process. CONSTITUTION:Wafers which are considered as one unit with a plurality of sheets are supplied to a prober 3 from a path 11. The prober 3 determines the position of wafer, places a probe card and semiconductor element in contact and gives the test start signal to a tester 1. The tester 1 judges adequacy or inadequacy of semiconductor element and gives the test end signal to the prober 3. When all tests of semiconductor element in the wafer have completed, wafers are supplied to an intermediate processing system 5. When the intermediate processing has completed in the system 5, wafers are supplied to the prober 4. The prober 4 and tester 2 perform the same operations as the prober 3 and tester 1, judging adequacy or inadequacy of semiconductor element. The wafers having completed tests are accommodated through the path 14. Thereby, manual transfer of wafers between respective processing systems can be saved.
申请公布号 JPS58201337(A) 申请公布日期 1983.11.24
申请号 JP19820084335 申请日期 1982.05.19
申请人 NIPPON DENKI KK 发明人 YASUDA TOSHIMI
分类号 H01L21/66;(IPC1-7):01L21/66 主分类号 H01L21/66
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