| 摘要 |
PURPOSE:To obtain the FET having a high withstand voltage and having the favorable characteristic in the high-frequency region by a method wherein SiO2 films added with Sn and not added with Sn are laminated on an N type GaAs active layer on a semiinsulating GaAs substrate, an opening is formed, the surface is covered with a Schottky metal, and after a liquified mask metal is applied, the metal is etched together with the mask material to form a gate electrode. CONSTITUTION:The SiO2 film 3 added with Sn is stacked on the N type GaAs layer 2 on the semiinsulating GaAs substrate 1, and the opening is formed in the film 3 applying a resist mask 4. The surface is covered with the SiO2 film 5, a heat treatment is performed to form an Sn diffusion layer 6, and the film 5 is anisotropically etched to leave the film 5 on the wall of the opening. Al 7 is adhered thereon, the liquified resist 8 is applied, dry etching is performed to remove selectively the mask 8 and a part of Al 7 to form the Schottky electrode 9, and the SiO2 film 3 is removed selectively to form source.drain electrodes 10,11. According to this construction, reduction of the reversely withstand voltage is prevented owing to the interposition of the remaining SiO2 film 5 on the wall face of the opening in the film 3, and moreover stacking of the gate electrode 9 to the insulating layers 5, 3 can be made to be the minimum, and the characteristic in the high-frequency region is improved. |
