Fault-tolerant circuitry for semiconductor memory.

摘要

A semiconductor memory with a spare row (11) or column added to a memory array, comprising a substitution circuit which, in the presence of an address input appointing a defective selecting line, drives a spare selecting (WLS) line in place of regular selecting lines (WL). In order to disable all the regular selecting lines (WL) a drive pulse (0x) to be impressed on drivers (WD) for these selecting lines (WL) is cut off.