| 摘要 |
A semiconductor memory device which comprises data lines each connected with memory cells, a precharging circuit for precharging the data lines, and an address signal state transition detector to detect a state transition of an address signal to cause the precharging circuit to precharge the data lines. The semiconductor memory device further comprises a data line voltage level detect circuit for detecting the voltage level of the data lines being precharged to minimize the precharging period of data lines, and a flip-flop circuit which causes the precharging circuit to precharge the data lines when an address signal state transition is detected by the address signal state transition detector, and which disables the precharging circuit from precharging the data lines when it is detected by the voltage level detect circuit that the data lines have been precharged to a predetermined voltage level.
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