发明名称 FORMING METHOD FOR PATTERN
摘要 PURPOSE:To form a self-alignment film such as a gate side-surface isolation film of excellent controllability through heat treatment or a gas chemical reaction by exposing only an uneven side surface by utilizing the ethcing characteristics, etc. of a silicon compound through a plasma CVD method. CONSTITUTION:A gate insulating film 1' and a phosphorus doped polysilicon gate 2 are formed to a P-Si substrate 1, and phosphorus or arsenic is doped while using the film 1' and the gate 2 as masks to form a source 3 and a drain 4. An insulating isolation SiO2 film 5 is formed previously to a field. The polysilicon of a gate side surface section is exposed when Si3N4 11 is formed through the plasma CVD method and whole is immersed in fluoric acid, and an SiO2 film 12 is grown on the side surface section of a semiconductor material exposed when the polysilicon is left as it is in an oxygen atmosphere. A Si3N4 film is immersed in phosphoric acid heated and removed, Mo or Pt is evaporated on the whole surface, and MoSi2 13 is formed to the surfaces of the gate, the source and the drain.
申请公布号 JPS58197821(A) 申请公布日期 1983.11.17
申请号 JP19820080006 申请日期 1982.05.14
申请人 TOKYO SHIBAURA DENKI KK 发明人 YOSHIMI MAKOTO
分类号 H01L21/302;H01L21/306;H01L21/3065;H01L29/78;(IPC1-7):01L21/306 主分类号 H01L21/302
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