| 摘要 |
PURPOSE:To form a highly integrated, high performance, bipolar type, integrated circuit, by reducing intervals between electrodes such as a collector, an emitter, and a base, thereby reducing parasitic resistance of Rsc and the like of a transistor. CONSTITUTION:An N<+> type embedded region 2 is formed in a P type semiconductor substrate 1. An N type epitaxial layer 3 is formed on the region 2. By utilizing an etched film 13, ion implantation of boron, selective removal of a silicon layer, and selective oxidation are performed, and a thick oxide film 4 and a P type channel stopper 5 are formed. After a resist film 14 is removed, the etched film 13 is utilized and the selective oxidation is performed so as to form an oxide film 16. The etched film 13 is selectively removed, and a N type phosphorus diffused region 6 is formed. With the resist 14 as a mask, the etched film 13 is selectively removed. Boron and arsenic ions are implanted through the window made by said etching, and a base region 7 and an emitter region 8 are formed. A platinum silicide layer 9 is formed at the contact parts of a collector, an emitter, a base, and a Shottky barrier. Then a Ti-W layer 11 and an aluminum layer 12 are formed and the device is completed. |
