| 摘要 |
PURPOSE:To charge quickly a bus up to prescribed level in an inactive mode in order to realize a high-speed RAM, by using an FET for equalizer having the threshold voltage close to 0V to form a bias device of complementary type. CONSTITUTION:The control signals impressed to lines 9a and 9b are set at level ''L'' along with coupling FET8a-9d turned off in an inactive mode when no writing/reading is carried out to buses 1a and 1b. At the same time, each bus is cut off from circuits 4a and 4b. During this period, the control signal impressed to a line 11 is set at ''H'' level, and an FET10 for equalizer conducts. Then each bus is charged up to a level lower than the level VR by VTH. The control signal applied to the line 11 is set at ''H'' level when an inactive time band is inserted before the reading/writing is performed. Therefore the FET10 is turned on, and the buses of ''H'' and ''L'' levels are equalized to each other to accelerate the charging action. |
