| 摘要 |
PURPOSE:To reduce the hardware quantity and improve a detection capability compared with a case where an error is detected in parallel, by giving a series CRC operation to the information stored in a storage device to detect an error. CONSTITUTION:An error detection control circuit 3 advances the designation of addresses. At the same time, the read information from an address 0 of a fixed storage device 1 through the final storage address (n) where the error detection information is stored is made into series form successively to perform a CRC (cyclic redundancy check) operation. A CRC operation is given to the error detection information stored in the address (n), and then the address stored in an address counter 2 is turned into an address n+1. Thus the coincidence is obtained with the value of the address stored previously. Then the counter 2 generates an error detection stop signal 16 to discontinue the working of the circuit 3, and at the same time an error detecting circuit 6 is set in an enable state. A CRC output signal 14 is inspected by the circuit 6, and an error display signal 15 showing the result of the inspection is delivered. |
