| 摘要 |
A circuit arrangement incorporated in a class AB amplifier for controlling the quiescent current through the transistors (T1, T2) incorporated therein so that the load current (IL) is zero when the input voltage (IIN) to the amplifier is zero. The arrangement comprises two feedback loops, each connected to the base circuits of both amplifier transistors. One feedback loop comprises a sensing resistor (R1) connected to the load (Z), an adder (S1) and an amplifier element (A1) with high gain and input impedance. The second feedback loop comprises a sensing resistor in the main current flow of the second transistor (T2), an adder (S2) and an amplifier element (A2) of the same kind as the first one (A1). The degree of feedback in the second loop is suitably selected greater than that of the first loop to achieve a greater control range for the amplifier.
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