| 摘要 |
<p>PURPOSE:To obtain a PLL circuit hardly affected by the missing of a disturbance signal, by providing a circuit means for detecting the period when an incoming signal is absent over a prescribed time and a circuit means for suppressing the feedback of the phase difference to a voltage controlled oscillator in accordance with a detection signal from the circuit means. CONSTITUTION:Output signals 20, 21 of gates 13, 14 are supplied to a control input of a voltage controlled oscillator 15 as a deceleration signal and an acceleration signal, respectively. When a tachogenerator pulse 5 is generated normally, the deceleration signal 20 corresponding to the phase difference between the tachogenerator pulse 5 and a signal 6 is supplied to the voltage controlled oscillator 15, which is controlled so that the oscillating frequency is reduced. When the tachogenerator pulse 5 is missing, a counter 16 stops the count operation and no output signal 22 is generated. Thus, the deceleration signal 20 (of course, the acceleration signal 21) is suppressed with the gate 13 and not generated, and the voltage controlled oscillator 15 keeps the oscillating frequency just before.</p> |
