| 摘要 |
PURPOSE:To obtain a logical amplitude converting circuit having a large degree of freedom, by providing a level shifter which feeds the 1st logical amplitude and converts it into the 2nd logical amplitude and another level shifter which feeds the 2nd logical amplitude into the 3rd logical amplitude. CONSTITUTION:The potentials of the 1st-4th power supply lines 17, 2, 1 and 3 are set at V17, V2, V1 and V3, respectively. The high and low levels of the 1st logical amplitude V17-V2 and the 3rd logical amplitude V1-V3 are set at H1, H3, L1 and L3, respectively. When logical L1 is applied to an input terminal 4, an output terminal 14a of a CMOS inverter IV14 is set at H1. While an output terminal 15a of a CMOSIV15 is set at L1. Then nodes 20a and 21a of a level shifter LS22 are set at logical L1 and H3, respectively. Therefore, an output terminal 13 of an LS16 is set at a logical H3. In this case, IV14 and 15 work with the logical amplitude V17-V2, the LS16 works the logical amplitude V1-V3, and an LS22 works with a logical amplitude V1-V2, respectively. This process elimnates the presence of a common power supply line between the 1st and 2nd logical amplitude circuits. Thus the 1st logical amplitude can be converted into the 3rd logical amplitude in a wide range of levels. |
