| 发明名称 |
Method for fabricating a trench MOS power transistor |
| 摘要 |
A method for fabricating a trench MOS transistor includes the step of at least partly filling the trench with a conductive material which is isolated from the inner surface of the trench by an insulating layer. The insulating layer has a layer thickness that is larger in the region of the lower end of the trench than at the upper end of the trench.
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| 申请公布号 |
US2002094635(A1) |
申请公布日期 |
2002.07.18 |
| 申请号 |
US20020058526 |
申请日期 |
2002.01.28 |
| 申请人 |
HIRLER FRANZ;KOTEK MANFRED;LARIK JOOST |
发明人 |
HIRLER FRANZ;KOTEK MANFRED;LARIK JOOST |
| 分类号 |
H01L21/336;H01L29/40;H01L29/423;H01L29/51;H01L29/78;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/336 |
| 代理机构 |
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代理人 |
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| 主权项 |
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