发明名称 |
Integrable decoding circuit |
摘要 |
A decoding circuit for decoding information represented by input signals includes: sources of transistors of one channel type in each of four CMOS inverters connected to a first supply potential; sources of transistors of another channel type in each two inverters connected to each other and to one or the other of first connecting points; two first switching transistors of the other channel type each having a drain connected to a first connecting point and a source connected to each other and to a last connecting point; the gates of each of the two first switching transistors being connected to a second input signal or a signal complementary thereto of four further input signals complementary to each other in pairs; a last switching transistor of the other channel type having a drain connected to the last connecting point, a source connected to a second supply potential and a gate connected to an input for an individual input signal; the gates of both transistors of two of the inverters being connected to a first input signal and the gates of both transistors of two of the inverters being connected to an input signal complementary to the first input signal; and further complementary transistors of the one channel type each having a drain connected to one of the connecting points, a source connected to the first supply potential and a gate connected to the gate of the switching transistor connected to the same connecting point.
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申请公布号 |
US4694278(A) |
申请公布日期 |
1987.09.15 |
申请号 |
US19860908829 |
申请日期 |
1986.09.18 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
FUCHS, HANS P.;GOETZ, JUERGEN R. |
分类号 |
G11C11/408;G11C11/413;H03M7/00;H03M7/22;(IPC1-7):H03M7/00 |
主分类号 |
G11C11/408 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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