| 摘要 |
<p>PCT No. PCT/FR80/00149 Sec. 371 Date Jun. 10, 1981 Sec. 102(e) Date Mar. 6, 1981 PCT Filed Oct. 10, 1980.A digital signal of n-bit words Ni is enciphered into an enciphered signal of n-bit words Ri. In an enciphering unit, a logic circuit delivers each enciphered word Ri through a logic operation g performed on the word Ni and on an n-bit, stored, enciphering word Pi-l. An addressing circuit formulates an address word Ai-l having a bits fully or partly belonging at least to the preceding enciphered word Ri-l. A memory of 2a predetermined Pi-l words is read by each address word Ai-l to supply a corresponding word Pi-l to the logic circuit for it to perform the g operation such that Ri=g(Ni, Pi-l). A deciphering unit receives the enciphered words Ri for formulating the address words Ai controlling reading of the corresponding words Pi out of 2a stored words. Each deciphered word Ni is obtained by a logic operation h, referred to as contrary to g, performed on the enciphered word Ri and on the stored work Pi-l, such that N=h(Ri, Pi-l). The memories can be programmed by a computer, which, as per a predetermined algorithm, computes a table of words Pi for a given key.</p> |
