| 摘要 |
PURPOSE:To produce an m-check byte in an m-menory address cycle, by using a circuit which produces an address sequence to read successively check bytes Am-1,...A1 and A0 out of a memory which stores the check bytes A1...and Am-1. CONSTITUTION:A data byte D is fed at a time point t=0. Then check bytes A3, A2, A1 and A0 are delivered from a memory 102 at time points when the count values of the lower bits of a counter 100 are set at 0, 1, 2 and 3 respectively. The byte A3 read out of the memory 102 is set to a register 104 and held there for a full period of t=0. A register 103 is reset for a period during which the count value of the lower bits of the counter 100 is set at 0. Then the bytes A2, A1 and A0 are set while the count value is set at 1, 2 and 3 respectively. When the count values of the lower bits of the counter 100 are set at 0, 1, 2 and 3, the state of the next time point is delivered from an excusive OR circuit 106 and then written to the memory 102. |
