| 摘要 |
Process for the positioning of an interconnection line on an electrical contact hole of an integrated circuit, wherein, when the electrical contact hole has been produced, the following stages are performed: deposition of a conductive layer in which the interconnection line is to be formed on the complete integrated circuit; deposition on the conductive layer of an insulating layer blanking the relief thereof and having a planar surface, etching the insulating layer, so that insulating material is only left at the location of the electrical contact hole, deposition of a resin layer on the integrated circuit, so as to mask the interconnection line to be produced, etching of that part of the conductive layer which is free from resin and the residual insulating layer, and elimination of the remaining insulating layer and the resin layer. The positioning process is particularly used in processes for producing MOS integrated circuits. |
