| 摘要 |
PURPOSE:To simplify the monitor for the state of a digital processing system and to facilitate the discrimination of a stable state, by sampling an input signal by a reversible counter for each fixed time. CONSTITUTION:A binary quantizing circuit 3 quantizes the output signal of a comparator 2 into binary information, and the output of quantization is fed to a monitoring counter 7 via a reversible counter 4 and an OR circuit 10. The counter 4 integrates the binary information, and the output of integration is fed to a switch circuit 6 and a reversible counter 8. The counter 7 produces a sampling pulse for each fixed interval based on the binary information. The sampling pulse is applied to a latch circuit 9. |
