| 摘要 |
<p>PURPOSE:To simplify the circuit and to improve the effect of memory when it is increased in number, by forming a series circuit with resistor, control transistor (TR) and cut-off TR. CONSTITUTION:When the memory does not perform normal operations, i.e., write and erase, and a write external terminal W1 is fixed to a Vdd level and an erase external terminal E6 is to a Vss level, a signal D is brought to the Vss level at readout and a write data P from an NAND gate 8 is brought to the Vdd level, and a signal G is brought to the Vdd level, then the control TR3 and the cut-off TR7 are both set on and the gate of the memory 4 goes to the Vss level. Further, when at least the signal G is brought to the Vss level at non- readout, then the TR7 is set off and the gate of the memory 4 is kept to the Vdd level. The number of gate required for each memory is decreased remarkably by using this method.</p> |
