| 摘要 |
<p>A semiconductor memory and its manufacturing method are provided to improve data retention reliability by preventing electric charges from moving between floating gate electrodes through inter-gate dielectrics using a plurality of STI layers. A plurality of floating gate electrodes(FG1a to FG7a) are arranged like a matrix type structure on a semiconductor region(20) via tunnel insulating layers(12a to 12g). Inter-gate dielectrics(14aa to 14ga) are formed on the floating gate electrodes, respectively. A plurality of control gate electrodes(CG1a to CG7a) are formed on the inter-gate dielectrics, respectively. A plurality of STI layers are alternately arranged between the control gate electrodes along a column direction of the matrix type structure. Each STI layer is used for isolating electrically the inter-gate dielectrics from each other.</p> |
