发明名称 HIGH-SPEED FREQUENCY DIVIDING CIRCUIT
摘要 PURPOSE:To perform high-speed transmission, by driving a master and a slave frequency divider by a push-pull inverter capable of generating two driving signals which are out of phase with each other while their phase difference is almost eliminated. CONSTITUTION:A signal S1 appearing at the output side of a transistor TR29a is delayed in phase behind a signal S2 appearing at the output side of a TR28a by as much as it passes through the TR29a. Those signals S1 and S2 are supplied to TRs 31b and 32a, and 32b and 31a of the push-pull inverter circuit 3 to obtain output signals S2 and S4 at the output sides of the TRs 31a and 32a. Then, this circuit 3 outputs signals phi and phi' which are in phase with each other. Those signals phi and phi' are frequency-divided by 2 through the frequency dividing circuit 4 consisting of latch circuits 41 and 43, and a sampling circuit 42 and then supplied to the next stage through a sense amplifier 5.
申请公布号 JPS58188936(A) 申请公布日期 1983.11.04
申请号 JP19820071924 申请日期 1982.04.28
申请人 SONY KK 发明人 YAMADA TAKAAKI
分类号 H03B19/14;H03K23/00;H03K23/42;H03K23/58 主分类号 H03B19/14
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