| 摘要 |
The problem of cyclically adding together sums having any number of bits per word occurs for the buffer storage of the binary coded information, particularly in the case of ultrasonic sector image display. The summation should be as fast as possible in this connection and the control outlay should be kept low in the associated device. According to the invention, the number of bits per word of the sums to be added is taken into consideration in a once-only lead computing time and otherwise the cyclically occurring values are added together independently of the number of bits per word of the summand. In the associated device, in each case several digital adders (1 to 3) are connected in parallel for in each case a predetermined quantity of bits (word length) and are in each case connected to a flip flop (4, 5) for buffer storage of the carry, the output line of each adder (1 to 3) exhibiting at least one register (12, 22, 32) into which an initial value of the summation can be input and fed back to the summation input of the adders (1 to 3). <IMAGE>
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