| 摘要 |
PURPOSE:To save a selecting circuit for the selection of memory addresses. amd readout/write clocks, etc. by fixing the control speed of a buffer memory among plural buffers. CONSTITUTION:The 1st and the 2nd buffer memories 10, 11 store data XIDT of one line respectively. A selection circuit 12 selects address counters 13 and 14 of high and low speed respectively. When the data XIDT is inputted to the 1st buffer memory 10, this data is written in high speed with the high speed address counter 13 and transferred to the 2nd buffer memory 11. In this case, since the circuit 12 selects the counter 13, the 2nd buffer memory 11 writes the data XIDT in high speed. Since the circuit 12 selects the counter 14 further, the data is read out from the 2nd memory. During this time, the data of the next one line is written in the 1st memory 10 in high speed. |
