| 摘要 |
PURPOSE:To obtain an integrated circuit which is reduced in chip area and can be tested efficiently by simplifying the constitution of a two-port FF. CONSTITUTION:When this FF is in normal mode, input data is supplied to a terminal 1 to hold a clock TCK at an H level the inversion of TCK at an L level and also the states of an MOSFET 4 turned off and an MOSFET 9 turned on are maintained. Then, a clock, the inversion of NCK is supplied to a terminal 5 and a clock NCK is supplied to a terminal 10 to drive the FF, which functions to delay the input data inputted to the terminal 1 by one clock. In test mode, on the other hand, input data is supplied to a terminal 2 to hold the clock NCK at the H level and the clock, the inversion of NCK at the L level and also the MOSFET 3 in the off state and the MOSFET 8 in the on state are maintained. Then, the clock inversion TCK is supplied to a terminal 6 and the clock TCK is supplied to a terminal 11 to drive the FF, which functions to delay the data supplied to the terminal 2 by one clock. |
