| 摘要 |
PURPOSE:To obtain a parallel A/D conversion circuit which discriminates simply whether or not malfunction takes place, by comparing two reference levels in which the levels are located adjacently to an analog input signal level, respectively. CONSTITUTION:Inverters 511-51i+1 and AND gates 521-52i+1 detect the state of level comparison circuits comparing adjacent two levels, respectively. When all the level comparison circuits are operated normally, signals of level 1 are consecutive for some time and then the rest signals are all 0 level in the input signal to the inverters 511-51i. As a result, an MOS transistor(TR) 54 is turned on and the output of an inverter 56 goes to 0 level. Further, if a level comparison circuit is failed, the two MOS TRs 54 are turned on at the same time and level 1 is outputted from the inverters 5. If >=2 level comparison circuits are failed, the output of the inverter 56 goes to 1 naturally. |
