| 摘要 |
Low power consumption methods and apparatus for distributing and controlling on-chip generated high voltage are described, e.g. for programming nonvolatile memory arrays and the like. A selected node is charged to a first potential while remaining nodes are charged to a second potential. The selected node(s) is (are) then isolated and charged to a high potential, eg 10-50 volts, by an on-chip device. The high potential charging device may sense the potential of a node and only be enabled to charge that node to a high potential if the sensed potential is above a given potential, ie at the first rather than the second potential. The arrangement reduces the current requirement and allows the use of an on-chip charging device. |
